SAB80C515A-5 Datasheet, PDF (24/108 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller Family

System Reset
4 System Reset
4.1 Additional Hardware Power Down Mode in the SAB 80C515A
The SAB 80C515A has an additional Power Down Mode which can be initiated by an external signal
at a dedicated pin. This pin is labeled HWPD and is a floating input line (active low). This pin
substitutes one of the V_CC pins of the base types SAB 80C515 (PLCC68: Pin68). Because this new
power down mode is activated by an external hardware signal this mode is referred to as Hardware
Power Down Mode in opposite to the program controlled Software Power Down Mode.
Pin PE/SWD has no control function for the Hardware Power Down Mode; it enables and disables
only the use of all software controlled power saving modes (Idle Mode, Software Power Down
Mode).
The function of the new Hardware Power Down Mode is as follows:
The pin HWPD controls this mode. If it is on logic high level (inactive) the part is running in the
normal operating modes. If pin HWPD gets active (low level) the part enters the Hardware Power
Down Mode; as mentioned above this is independent of the state of pin PE/SWD.
HWPD is sampled once per machine cycle. If it is found active, the device starts a complete internal
reset sequence. This takes two machine cycles; all pins have their default reset states during this
time. This reset has exactly the same effects as a hardware reset; i.e.especially the watchdog timer
is stopped and its status flag WDTS is cleared. In this phase the power consumption is not yet
reduced. After completion of the internal reset both oscillators of the chip are disabled, the on-chip
oscillator as well as the oscillator watchdog’s RC oscillator. At the same time the port pins and
several control lines enter a floating state as shown in table 4-1. In this state the power consumption
is reduced to the power down current I_PD . Also the supply voltage can be reduced. Table 4-1 also
lists the voltages which may be applied at the pins during Hardware Power Down Mode without
affecting the low power consumption.
Semiconductor Group
4-1