SAB80C515A-5 Datasheet, PDF (45/108 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller Family

On-Chip Peripheral Components
5.3.1 Programmable Watchdog Timer
To protect the system against software upset, the user’s program has to clear the watchdog within
a previously programmed time period. If the software fails to do this periodical refresh of the
Watchdog Timer, an internal hardware reset will be initiated. The software can be designed such
that the watchdog times the if the program does not work properly. It also times out if a software
error is based on hardware-related problems.
The Watchdog Timer in the SAB 80C515A is a 15-bit timer, which is incremented by a count rate of
either f_CYCLE/2 or f_CYCLE /32 f( _CYCLE = f_OSC/12). That is, the machine clock is divided by a series of
arrangement of two prescalers, a divide-by-two and a divide-by-16 prescaler (see figure 5-6). The
latter is enabled by setting bit WDTREL.7.
Figure 5-6
Block Diagram of the Programmable Watchdog Timer
Semiconductor Group
5-12