SAB80C515A-5 Datasheet, PDF (27/108 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller Family

System Reset
4.2 Hardware Power Down Reset Timing
Following figures are showing the timing diagrams for entering (figure 4-1) and leaving (figure 4-2)
the Hardware Power Down Mode. If there is only a short signal at pin HWPD (i.e. HWPD is sampled
active only once), then a complete internal reset is executed. Afterwards the normal program
execution starts again (figure 4-3).
Note:
Delay time caused by internal logic is not included.
The Reset pin overrides the Hardware Power Down function, i.e. if reset gets active during
Hardware Power Down it is terminated and the device performs the normal reset function. Thus, pin
Reset has to be inactive during Hardware Power Down Mode.
Semiconductor Group
4-4