GX4002 Datasheet, PDF (6/74 Pages) Gennum Corporation – Dynamic on-chip power management control

1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin #
1
2
3, 4
Name
SDO0VCC
SDO0VEE
NC
Type
Power
Ground
—
5
RS1
Digital
Input
6, 7
SDI1, SDI1
Input
8
Ch1LOS
Digital
Output
9
10
11
12
13
14, 15
Ch1LF
Ch1VCOVEE
Ch1VCOFILT
Ch1VEE
Ch1VCC
SDO1,
SDO1
16
RESET
17
18
19, 20
21
22
23
24
Ch0VCC
Ch0VEE
SDI0, SDI0
Ch0VCOFILT
Ch0VCOVEE
Ch0LF
GND
25
SDA
26
SCL
Passive
Ground
Passive
Ground
Power
Output
Digital
Input
Power
Ground
Input
Passive
Ground
Passive
Ground
Digital
Input/
Output
Digital
Input
Description
Power supply for channel 0 path output.
Ground for channel 0 path output.
No connect.
Input Digital LVTTL/LVCMOS-compliant input.
Rate Select Input for the Ch1 Signal Path.
See Section 3.1 Multirate CDR Functionality for more details.
High-speed input for the channel 1 signal path.
SFP+-compliant active-high digital output. Open-collector Loss-Of-Signal indicator for
the channel 1 signal path. Requires an external pull-up resistor.
When Ch1LOS is LOW, a valid channel 1 input signal has been detected.
When Ch1LOS is high-impedance, a valid channel 1 input signal has not been detected.
Configurable as LVTTL/LVCMOS-compliant output.
Loop filter capacitor connection for the channel 1 signal path.
Ground for the channel 1 signal path VCO.
Filter for the channel 1 signal path VCO supply.
Ground for the channel 1 signal path and output.
Power supply for the channel 1 signal path and output.
High-speed differential output for the channel 1 signal path.
Digital active-low LVTTL/LVCMOS-compliant Schmitt-trigger input.
Device reset control pin.
Includes an internal pull-down resistor to hold the device in a reset state during
power-up, should this pin be externally disconnected.
Power supply for the channel 0 signal path.
Ground for the channel 0 signal path.
High-speed input for the channel 0 signal path.
Filter for the channel 0 signal path VCO supply.
Ground for the channel 0 signal path VCO.
Loop filter capacitor connection for the Ch0 signal path.
Connect to GND.
Digital active-high serial data signal for the host interface.
Bi-directional, I²C-compliant, open-drain driver/receiver.
Digital active-high clock input signal for the serial host interface.
GX4002 2x2 14.025Gb/s Crosspoint Switch with Trace
Equalization and Output De-Emphasis
Data Sheet
55972 - 0
March 2012
6 of 74
Proprietary & Confidential