GX4002 Datasheet, PDF (49/74 Pages) Gennum Corporation – Dynamic on-chip power management control

Table 3-8: Ch0 CDR Power-Down (Continued)
Description
0
0
0
0
1
0
Diagnostic mode with horizontal eye monitor enabled.
0
0
0
1
0
0
Diagnostic mode with divided recovered clock available through Ch0 SDO.
Requires appropriate configuration of loopback registers.
Table 3-9: Ch0 SDO Power-Down
Description
1
x
x
x
Completely powers-down the Ch0 SDO.
x
1
x
x
Completely powers-down the Ch0 SDO.
0
0
x
1
Independently powers-down the Ch0 SDO cross point adjust feature.
0
0
0
0
Ch0 SDO with all features enabled.
3.9 Device Reset
RESET is an active-low signal with LVTTL/LVCMOS compatible signalling levels. RESET
has a weak pull-down to keep the device in reset upon power-up. RESET does not have
schmitt trigger since reset negation is internally synchronized. See Figure 6-7.
3.9.1 Reset State During Power-up
The device requires RESET to be continuously asserted LOW during power ramp up.
RESET must continue to be held in an asserted LOW state for the minimum specified
time after the power supply has reached 90% of its final settling value. Following a
RESET assertion at power-up, the device may be reset again at any time with the
minimum specified pulse width on RESET. Refer to Figure 3-24.
GX4002 2x2 14.025Gb/s Crosspoint Switch with Trace
Equalization and Output De-Emphasis
Data Sheet
55972 - 0
March 2012
49 of 74
Proprietary & Confidential