LC822973 Datasheet, PDF (26/27 Pages) Sanyo Semicon Device – CMOS LSI TV Image Viewer LSI

AC characteristics (Reset condition)
LC822973
Fixing XRST pin to Lo level initializes the internal FF. The filter circuit that used delay device is embedded inside so
that an error operation won’t be performed even if a noise is on XRST pin. The condition of Lo period is as follows.
XRST
20ns(min)
Lo period restricyion of XRST pin
Power turn-ON/turn OFF-conditions
This LSI needs digital power (DVDD15 [core], DVDD3 [DRAM], DVDDIO), analog power for DAC (AVDD3) and
analog power for PLL (AVDD15). Power turn ON/turn OFF conditions is shown in the following sequence diagram.
It is desirable for DVDD15 and DVDDIO/DVDD3 to maintain
DVDD15 > = DVDDIO/DVDD3/AVDD3/AVDD15 relation as below or at the same time.
However, the condition is acceptable when the period, which is the reversed relation, is within 1ms.
Simultaneous of power turn ON / turn OFF of DVDDIO/DVDD3/AVDD3/AVDD15 is all preferable. However, there is
no problem even if the time difference is mutually generated.
However, please avoid keeping only a certain power supply in the state of power turn OFF.
ON
DVDD15 OFF
same time or
DVDD15 ON early
same time or
DVDD15 OFF later
ON
DVDDIO
OFF
ON
DVDD3
OFF
AVDD3
AVDD15
ON
OFF
ON
OFF
Simultaneous of power turn ON/turn OFF of DVDDIO/DVDD3/
AVDD3/AVDD15 is all preferable. However, there is no
problem even if the time difference is mutually generated.
Power turn-ON/turn-OFF sequence
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