LC822973 Datasheet, PDF (11/27 Pages) Sanyo Semicon Device – CMOS LSI TV Image Viewer LSI

Pin Description
LC822973
analog
DAC
analog
PLL
Pin name
CKI
XRST
DB17
DB16
D[15:0]/
VIFVD[15:0]
A0/ (IDSEL)
RD/ (VIFVS)
WR/ (VIFHS)
CS/ (VIFFI)
INT
MON
USEVIF
SDA
SCL
DACOUT
IOB
COMP
VREF
IREF
VCNT
MODE[2:0]
CONF3
CONF2
/ (VIFDOT)
CONF1
/ (VIFVACT)
CONF0
/ (VIFHACT)
DVDD15
DVDDIO
DVDD3
AVDD3
AVDD15
DVSS
AVSS
Pol.
Dir
Description of function
-
I
Master clock
L
I
Master reset, Low active
-
I
(bit17) extended bit. use at 18bit mode.
-
I
(bit16) extended bit. use at 18bit mode
Data bus, needs pull-up resistance externally
-
I/O (unnecessary if either device always drives bus).
This bus is sharing for the VIDEOIF.
-
I
Address/ (IDSEL at VIDEOIF).
L
I
Read pulse/ (Vsync in at VIDEOIF).
L
I
Write pulse/ (Hsync in at VIDEOIF).
L
I
Chip select/ (Field index in at VIDEOIF).
L
O Interrupt
H
O Monitor
Set "H" in case of VIDEOIF mode.
H
I
The command issue is via I²C bus.
-
I/O SDA for I²C bus.
-
I
SCL for I²C bus.
Ana
O DAC output
Ana
O DAC_IOB pin
Ana
O DAC_COMP pin
Ana
O DAC_VREF pin
Ana
O DAC_IREF pin
Ana
I
VCNT pin
-
I
For test *
-
I
To decide input format
To decide input format
-
I
/ (Dotclock in at VIDEOIF)
To decide input format
-
I
/ (V-valid period flag in at VIDEOIF)
To decide input format
-
I
/ (H-valid period flag in at VIDEOIF)
Pow
-
DVDD for digital core (1.5V part)
Pow
-
DVDD for digital I/O part
Pow
-
DVDD for stacked SDRAM (it's controlled by internal switch cell)
Pow
-
AVDD for DAC analog (analog 3V)
Pow
-
AVDD for PLL analog (analog 1.5V)
Pow
-
GND for digital part
Pow
-
GND for analog part
Total
* MODE pins are for testing.
They should be fixed to "L" normally.
at
Pin
reset
-
1
-
1
-
1
-
1
-
16
-
1
-
1
-
1
-
1
"0"
1
"0"
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
3
-
1
-
1
-
1
-
1
-
4 (6)
-
4 (7)
-
3 (4)
-
1
-
1
-
6 (13)
-
2
63 (76)
No.A2131-11/27