LC822973 Datasheet, PDF (17/27 Pages) Sanyo Semicon Device – CMOS LSI TV Image Viewer LSI

LC822973
Writing image format (via VIDEO I/F)
Writing from video IF corresponds to various entry formats such as YUV422 (8bit), YUV422 (8bitBT656decode),
YUV422 (16bit), RGB565 (16bit), and RGB666 (18bit).
When video IF is used, the USEVIF pin is set to "H". The VIFFMT register is set and a necessary input format is
decided at the same time. In this LSI, internal processing is YUV system.
The RGB → YUV matrix processing operates automatically when RGB is input.
USEVIF
1
VIFFMT[3:0]
0
1
2
3
4
5
6
Data Format
YUV422
RGB565
YUV422
RGB565
RGB666
BT656decode
No
Yes
No
Transfer
16bit
16bit
16bit
16bit
16bit
16bit
18bit
Format
(×2)
(×2)
(×2)
(×2)
(×1)
(×1)
(×1)
Trans num
1
2
1
2
1
2
1
2
1
1
1
DB17
17
-
-
-
-
-
-
-
-
-
-
R5
DB16
16
-
-
-
-
-
-
-
-
-
-
R4
D15/VIFVD15
15
-
-
-
-
-
-
-
-
Y7
R5
R3
D14/VIFVD14
14
-
-
-
-
-
-
-
-
Y6
R4
R2
D13/VIFVD13
13
-
-
-
-
-
-
-
-
Y5
R3
R1
D12/VIFVD12
12
-
-
-
-
-
-
-
-
Y4
R2
R0
D11/VIFVD11
11
-
-
-
-
-
-
-
-
Y3
R1
G5
D10/VIFVD10
10
-
-
-
-
-
-
-
-
Y2
G5
G4
D9/VIFVD9
9
-
-
-
-
-
-
-
-
Y1
G4
G3
D8/VIFVD8
8
-
-
-
-
-
-
-
-
Y0
G3
G2
D7/VIFVD7
7 U7/V7
Y7
U7/V7
Y7
R5 G2 G2 R5
U7/V7
G2
G1
D6/VIFVD6
6 U6/V6
Y6
U6/V6
Y6
R4 G1 G1 R4
U6/V6
G1
G0
D5/VIFVD5
5 U5/V5
Y5
U5/V5
Y5
R3 G0 G0 R3
U5/V5
G0
B5
D4/VIFVD4
4 U4/V4
Y4
U4/V4
Y4
R2
B5
B5
R2
U4/V4
B5
B4
D3/VIFVD3
3 U3/V3
Y3
U3/V3
Y3
R1
B4
B4
R1
U3/V3
B4
B3
D2/VIFVD2
2 U2/V2
Y2
U2/V2
Y2
G5
B3
B3
G5
U2/V2
B3
B2
D1/VIFVD1
1 U1/V1
Y1
U1/V1
Y1
G4
B2
B2
G4
U1/V1
B2
B1
D0/VIFVD0
0 U0/V0
Y0
U0/V0
Y0
G3
B1
B1
G3
U0/V0
B1
B0
USEVIF
1
VIFFMT[3:0]
7
8
9
10
Data Format
RGB666
RGB888
BT656decode
No
Transfer
18bit
18bit
18bit
24bit
Format
(×2)
(×2)
(×3)
(×3)
Trans num
1
2
1
2
1
2
3
1
2
3
DB17
17
-
-
-
-
-
-
-
-
-
-
DB16
16
-
-
-
-
-
-
-
-
-
-
D15/VIFVD15
15 R5 B1 R5 R3
-
-
-
-
-
-
D14/VIFVD14
14 R4 B0 R4 R2
-
-
-
-
-
-
D13/VIFVD13
13 R3
-
-
R1
-
-
-
-
-
-
D12/VIFVD12
12 R2
-
-
R0
-
-
-
-
-
-
D11/VIFVD11
11 R1
-
-
G5
-
-
-
-
-
-
D10/VIFVD10
10 R0
-
-
G4
-
-
-
-
-
-
D9/VIFVD9
9 G5
-
-
G3
-
-
-
-
-
-
D8/VIFVD8
8 G4
-
-
G2
-
-
-
-
-
-
D7/VIFVD7
7 G3
-
-
G1
-
-
-
R7 G7 B7
D6/VIFVD6
6 G2
-
-
G0
-
-
-
R6 G6 B6
D5/VIFVD5
5 G1
-
-
B5 R5 G5 B5 R5 G5 B5
D4/VIFVD4
4 G0
-
-
B4 R4 G4 B4 R4 G4 B4
D3/VIFVD3
3 B5
-
-
B3 R3 G3 B3 R3 G3 B3
D2/VIFVD2
2 B4
-
-
B2 R2 G2 B2 R2 G2 B2
D1/VIFVD1
1 B3
-
-
B1 R1 G1 B1 R1 G1 B1
D0/VIFVD0
0 B2
-
-
B0 R0 G0 B0 R0 G0 B0
* The width of the bus at video IF is decided by the register setting. (USEVIF=="H").
All the image ports are set to the input at video IF. Please connect an unused bit with GND (It shows "-" in the table).
No.A2131-17/27