LC822973 Datasheet, PDF (16/27 Pages) Sanyo Semicon Device – CMOS LSI TV Image Viewer LSI

LC822973
Writing image format (via CPU I/F)
The hardware adopts 24/18/16/9/8bit RGB format and YUV422 format of 24/18/16/9/8 as a CPU writing via CPU-I/F.
Input format is determined by CONF[3:0] pins.
The RGB → YUV matrix processing operates automatically when RGB input is formatted.
CONF[3:0]
0
1
2
3
4
5
6
7
8
Data
RGB565
YUV422
RGB666
RGB565
Transfer
Format
16bit
(×1)
16bit
(×1)
18bit
(×1)
18bit
(×2)
18bit
(×2)
18bit
(×2)
18bit
(×2)
16bit
(×2)
16bit
(×2)
trans num
1
1
2
1
1
2
1
1
2
2
1
2
1
2
1
2
DB17 17
-
-
-
R5
-
-
-
-
-
-
-
-
-
-
-
-
DB16 16
-
-
-
R4
-
-
-
-
-
-
-
-
-
-
-
-
D[15] 15
R5
Ya7 Yb7
R3
R5 B1 R5 R3 R5 G2
-
-
R5 G2 -
-
D[14] 14
R4
Ya6 Yb6
R2
R4 B0 R4 R2 R4 G1
-
-
R4 G1 -
-
D[13] 13
R3
Ya5 Yb5
R1
R3 -
-
R1 R3 G0
-
-
R3 G0 -
-
D[12] 12
R2
Ya4 Yb4
R0
R2 -
-
R0 R2 B5
-
-
R2 B5 -
-
D[11] 11
R1
Ya3 Yb3
G5
R1 -
-
G5 R1 B4
-
-
R1 B4 -
-
D[10] 10
G5
Ya2 Yb2
G4
R0 -
-
G4 R0 B3
-
-
G5 B3 -
-
D[9]
9
G4
Ya1 Yb1
G3
G5 -
-
G3 G5 B2
-
-
G4 B2 -
-
D[8]
8
G3
Ya0 Yb0
G2
G4 -
-
G2 G4 B1 R5 G2 G3 B1
-
-
D[7]
7
G2
U7
V7
G1
G3 -
-
G1 G3 B0 R4 G1
-
- R5 G2
D[6]
6
G1
U6
V6
G0
G2 -
-
G0 -
-
R3 G0
-
- R4 G1
D[5]
5
G0
U5
V5
B5
G1 -
-
B5 -
-
R2 B5
-
- R3 G0
D[4]
4
B5
U4
V4
B4
G0 -
-
B4 -
-
R1 B4
-
- R2 B5
D[3]
3
B4
U3
V3
B3
B5 -
-
B3 -
-
R0 B3
-
- R1 B4
D[2]
2
B3
U2
V2
B2
B4 -
-
B2 -
-
G5 B2
-
- G5 B3
D[1]
1
B2
U1
V1
B1
B3 -
-
B1 -
-
G4 B1
-
- G4 B2
D[0]
0
B1
U0
V0
B0
B2 -
-
B0 -
-
G3 B0
-
- G3 B1
For CONF==2:RGB666_18bit mode, R5 and R4 correspond DB17 and DB16 pins, respectively.
Otherwise, please connect DB17, 16 pins to GND.
CONF[3:0]
9
10
11
12
13
14
15
Data
RGB888
RGB666
RGB888
Transfer Format
24bit
(×2)
24bit
(×2)
18bit
(×3)
18bit
(×3)
24bit
(×3)
24bit
(×3)
24bit
(×3)
trans num
1212123123
1
2
3
1
2
3
123
DB17 17 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DB16 16 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
D[15] 15 R7 B7 R7 G7 R5 G5 B5 -
-
- Ra7 Ba7 Gb7 Ra7 Ga7 Ba7 -
-
-
D[14] 14 R6 B6 R6 G6 R4 G4 B4 -
-
- Ra6 Ba6 Gb6 Ra6 Ga6 Ba6 -
-
-
D[13] 13 R5 B5 R5 G5 R3 G3 B3 -
-
- Ra5 Ba5 Gb5 Ra5 Ga5 Ba5 -
-
-
D[12] 12 R4 B4 R4 G4 R2 G2 B2 -
-
- Ra4 Ba4 Gb4 Ra4 Ga4 Ba4 -
-
-
D[11] 11 R3 B3 R3 G3 R1 G1 B1 -
-
- Ra3 Ba3 Gb3 Ra3 Ga3 Ba3 -
-
-
D[10] 10 R2 B2 R2 G2 R0 G0 B0 -
-
- Ra2 Ba2 Gb2 Ra2 Ga2 Ba2 -
-
-
D[9] 9 R1 B1 R1 G1 -
-
-
-
-
- Ra1 Ba1 Gb1 Ra1 Ga1 Ba1 -
-
-
D[8] 8 R0 B0 R0 G0 -
-
-
-
-
- Ra0 Ba0 Gb0 Ra0 Ga0 Ba0 -
-
-
D[7] 7 G7 -
- B7 -
-
-
-
-
- Ga7 Rb7 Bb7 Rb7 Gb7 Bb7 R7 G7 B7
D[6] 6 G6 -
- B6 -
-
-
-
-
- Ga6 Rb6 Bb6 Rb6 Gb6 Bb6 R6 G6 B6
D[5] 5 G5 -
- B5 -
-
- R5 G5 B5 Ga5 Rb5 Bb5 Rb5 Gb5 Bb5 R5 G5 B5
D[4] 4 G4 -
- B4 -
-
- R4 G4 B4 Ga4 Rb4 Bb4 Rb4 Gb4 Bb4 R4 G4 B4
D[3] 3 G3 -
- B3 -
-
- R3 G3 B3 Ga3 Rb3 Bb3 Rb3 Gb3 Bb3 R3 G3 B3
D[2] 2 G2 -
- B2 -
-
- R2 G2 B2 Ga2 Rb2 Bb2 R2 Gb2 Bb2 R2 G2 B2
D[1] 1 G1 -
- B1 -
-
- R1 G1 B1 Ga1 Rb1 Bb1 Rb1 Gb1 Bb1 R1 G1 B1
D[0] 0 G0 -
- B0 -
-
- R0 G0 B0 Ga0 Rb0 Bb0 Rb0 Gb0 Bb0 R0 G0 B0
* 16bit or 8bit command area is to be sent within heavy-lined area. CONF==5, 6, 7, 8, 11, 12, and 15 correspond 8bit
command data, and the 16bit parameter register needs double transfer.
* Hatched area shows unused pins. "L" level is always output, so please keep them open.
* For CONF==14:24bit (×3) format, a dummy write of 0×0 data is required every time after sending all the frame data.
* For CONF==1:16bit-YUV422 format, RGB to YUV matrix conversion can be enabled by register setting, SYSCTL1
(bit5) MTXON, which is useful for the mixed format system of RGB565 and YUV422.
No.A2131-16/27