LC822973 Datasheet, PDF (21/27 Pages) Sanyo Semicon Device – CMOS LSI TV Image Viewer LSI

LC822973
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No
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Command name
45 0×2d OSDWFBHSTART
46 0×2e OSDWFBVSTART
47 0×2f
OSDWFBHLEN
48 0×30 OSDWFBVLEN
49 0×31 OSDRFBHOFST_1
50 0×32 OSDRFBVOFST_1
51 0×33 OSDHOFST_1
52 0×34 OSDVOFST_1
53 0×35 OSDHLEN_1
54 0×36 OSDVLEN_1
55 0×37 OSDCONT_2
56 0×38 OSDRFBHOFST_2
57 0×39 OSDRFBVOFST_2
58 0×3a OSDHOFST_2
59 0×3b OSDVOFST_2
60 0×3c OSDHLEN_2
61 0×3d OSDVLEN_1
62 0×3e OSDCOLOR_Y
63 0×3f
OSDCOLOR_U
64 0×40 OSDCOLOR_V
65 0×41 OSDWRITE
66 0×42 OSDABORT
67 0×43 VIFSYS
68 0×44 VIFHACTSTA
69 0×45 VIFHACTEND
70 0×46 VIFVACTSTA
71 0×47 VIFVACTEND
72 0×48 AVIEWSYS
73 0×49 AUTOVIEWON
74 0×4a AUTOVIEWOFF
75 0×4b AVWFBHSTART_0
76 0×4c AVWFBVSTART_0
77 0×4d AVWFBHSTART_1
78 0×4e AVWFBVSTART_1
79 0×4f
AVWFBHSTART_2
80 0×50 AVWFBVSTART_2
81 0×51 CGMSA_CODE
82 0×52 CGMSA_TRM
83 0×53 WSS_CODE
84 0×54 WSS_TRM
85 0×55
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|
112 0×70
Function
OSD1, 2 setup
OSD1, 2 setup
OSD1, 2 setup
OSD1, 2 setup
OSD1 setup
OSD1 setup
OSD1 setup
OSD1 setup
OSD1 setup
OSD1 setup
OSD2 setup
OSD2 setup
OSD2 setup
OSD2 setup
OSD2 setup
OSD2 setup
OSD2 setup
OSD1,2 setup
OSD1,2 setup
OSD1,2 setup
OSD drawing
OSD drawing
VIDEOIF setup
VIDEOIF setup
VIDEOIF setup
VIDEOIF setup
VIDEOIF setup
A-VIEW setup
A-VIEW start
A-VIEW stop
A-VIEW setup
A-VIEW setup
A-VIEW setup
A-VIEW setup
A-VIEW setup
A-VIEW setup
CGMSA setup
CGMSA setup
WSS setup
WSS setup
length
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
-
-
1word
1word
1word
1word
1word
1word
-
-
1word
1word
1word
1word
1word
1word
1word
1word
1word
1word
Description
SDRAM address offset for OSD drawing (H)
SDRAM address offset for OSD drawing (V)
SDRAM address length for OSD drawing (H)
SDRAM address length for OSD drawing (V)
SDRAM reading address (H) offset for OSD1
SDRAM reading address (V) offset for OSD1
display position offset (H) for OSD1
display position offset (V) for OSD1
display position length (H) for OSD1
display position length (V) for OSD1
burst length (SDRAM), OSD2 ON/OFF, etc.
SDRAM reading address offset (H) for OSD2
SDRAM reading address offset (V) for OSD2
display position offset (H) for OSD2
display position offset (V) for OSD2
display position length (H) for OSD2
display position length (V) for OSD2
OSD Y adjustment (Up: OSD1/Down: OSD2)
OSD U adjustment (Up: OSD1/Down: OSD2)
OSD V adjustment (Up: OSD1/Down: OSD2)
CPUOSD → SDRAM DRAW
CPUOSD → DRAW ABORT
Data ordering, sync polarity, internal valid flag on/off etc.
Internal valid flag (start position of H-flag)
Internal valid flag (end position of H-flag)
Internal valid flag (start position of V-flag)
Internal valid flag (end position of V-flag)
Num of bank at AUTOVIEW mode
Strat AUTOVIEWing
Stop AUTOVIEWing
Start position of bank#0 (H)
Start position of bank#0 (V)
Start position of bank#1 (H)
Start position of bank#1 (V)
Start position of bank#2 (H)
Start position of bank#2 (V)
CGMSA code setting
CGMSA position setting
WSS code setting
WSS position setting
reserved
|
reserved
for I²C
113 0×7E
114 0×7F
0×FC (I²C) : no use
0×FD (I²C) : IMGPORT
0×FE (I²C) : status (upper)
0×FF (I²C) : status (lower)
Image port
Status
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