DS_S1D2502A01 Datasheet, PDF (54/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
S1D2502A01
RECOMMENDATION
5V Power Routing
S1D2502A01's OSD part power is composed of analog VDD and digital VDD. To eliminate clock noise influence in
the digital block, you need to separate the analog VDDA and digital VDD.
(BD102 use: Refer to Application Circuit )
12V Power Routing
Because S1D2502A01 is a wideband AMP of above 150MHz, 12V power significantly affects the video
characteristics. The effects from the inductance and capacitance are different for each board, and , therefore,
some tuning is required to obtain the optimum performance. The output power, VCC2, must be separated from
VCC1 and VCC3 using a coil, which is parallel-connected to the damping resistor.The appropriate coil value is
between 20uH - 200uH. Parallel-connected a variable resistor to the coil and control its resistance to obtain the
optimum video waveform.
(Moreover, BD103 can tune using a coil and variable resistor to obtain the optimum video waveform.
L103, R124, BD103: Refer to application circuit)
VCC1, VCC3 12V Power
Use a 104 capacitor and large capacitor greater than 470uH for the power filter capacitor.
12V Output Stage Power VCC2
Do not use the power filter capacitor.
5V Digital Power VDD
Don't use a coil or magnetic core to the VDD input. Make the power filter capacitor, an electric capacitor of greater
than 50uF, single and connect it to VSS, the digital GND.
Output Stage GND2
Care must be taken during routing because it ,as an AMP output stage GND, is an important factor of video
oscillation. R/G/B clamp cap and R/G/B load resistor must be placed as close as possible to the GND2 pin. GND2
must be arranged so that it has the minimum GND loop, which at one point must be connected to the main GND.
Digital GND VSS
When this is to be connected directly to the GND2, it can cause the OSD clock noise, so the loop connection
should be routed as far away as possible. If the OSD clock noise affects the screen, separate VSS GND from all
GND and connect it to the main board using a bead. Again, the bead connection point should be placed as far
away as possible to the GND2.
Analog Block
The PLL built in to S1D2502A01 is sensitive to noise due to the wide range PLL characteristics. Therefore, you
need to isolate the analog block in the following manner. First make a separate land for the analog block (pin2 -
pin6)'s ground, and connect it to the main ground through a 1MΩ resistor. The analog GND of both sides of a
double faced PCB must be separated from the main ground. (Separate pin 2's 5V analog GND, which is the GND
for OSD PLL, from the main and digital GNDs and connect it to the main GND using about 1MΩ resistor. GND for
pins 2 - 6 is the No. 2 VSSA GND.)
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