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DS_S1D2502A01 Datasheet, PDF (1/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS | |||
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S1D2502A01
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
VIDEO AMP MERGED OSD PROCESSOR
The S1D2502A01 is a very high frequency video amplifier
& wide range OSD processor 1 chip system with I2C Bus
control used in monitors. It contains 3 matched R/G/B video
amplifiers with OSD processor and provides flexible
interfacing to I2C Bus controlled adjustment systems.
32-DIP-600A
FUNCTIONS
⢠R/G/B video amplifier
⢠OSD processor
⢠I2C bus control
⢠Cut-off brightness control
⢠R/G/B sub contrast/cut-off control
⢠Half tone
ORDERING INFORMATION
Device
Package
S1D2502A01-D0B0 32-DIP-600A
Operating Temperature
-20 °C â +75 °C
FEATURES
VIDEO AMP PART
OSD PART
⢠3-channel R/G/B video amplifier, 175MHz @f-3dB
⢠Built in 1K-byte SRAM
⢠I2C bus control items
⢠448 ROM fonts (each font consists of 12 à 18
â Contrast control: -38dB
dots.)
â Sub contrast control for each channel: -12dB
â Brightness control
â OSD contrast control: -38dB
â Cut-off brightness control (AC coupling)
â Cut-off control for each channel (AC coupling)
⢠Full screen memory architecture
⢠Wide range PLL available (15kHz â 96kHz,
Reference 800 X 600)
⢠Programmable vertical height of character
â Switch registers for SBLK and video half tone and ⢠Programmable vertical and horizontal
CLP/BLK polarity selection and INT/EXT CLP selection positioning
and generated CLP width control
⢠Character color selection up to 16 different
⢠Built in ABL (automatic beam limitation)
colors
⢠Built in video input clamp, BRT clamp
⢠Built in video half tone (3mode) function on OSD
pictures
⢠Programmable background color (up to 16
colors)
⢠Character blinking, bordering and shadowing
⢠Capable of 8.0Vp-p output swing
⢠Color blinking
⢠Improvement of rise & fall time (2.2ns)
⢠Character scrolling
⢠Cut-off brightness control
⢠Fade-in and fade-out
⢠Built in blank gate with spot killer
⢠Box drawing
⢠Clamp pulse generator
⢠Character sizing up to four times
⢠OSD intensity
⢠BLK, CLP polarity selection
⢠76.8MHz pixel frequency from on-chip PLL
(Reference 800 X 600)
⢠Clamp gate with anti OSD sagging
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