DS_S1D2502A01 Datasheet, PDF (43/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

S1D2502A01
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
• Positioning
The frame control register-2's HP Bit [F:8] signifies delay of the horizontal display from the H-Sync reference
edge to the character's 1st pixel location, and is controlled by multiplying HP [F:8]'s range value by 6. Also, VP
bit[7:0] signifies the top margin height from the V-Sync reference edge, and is controlled by multiplying 4 to the
VP [7:0]'s range value. Refer to the Figure shown below.
(HFLB)
HP[7:0]
30 columns (= 30 x 12 dots)
OSD characters
15 rows
(=15 x 18 lines)
Background Screen
Figure 17. Frame Composition with the OSD Characters
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