DS_S1D2502A01 Datasheet, PDF (29/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

S1D2502A01
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
Registers
Frame Control
Registers — 1
(Row 15,
Column 01)
Tabel 4. Register Description (Continued)
Bits
CP1, CP0
Description
Charge pump output current control
This is the PLL block's internal phase detector output status, converted into
current. Refer to PLL control.
CP1
CP0
0
0
0
1
1
0
1
1
Charge Pump Current
0.50 mA
0.75 mA
1.00 mA
1.25 mA
The output is decided by the combination of these two bits.
FBLK bit setting is explained at the figure below.
Blue
Red
Raster
Blue
Red
Green
Raster
Bordering
Character
Figure 11. Character/Raster Signal Part
28