DS_S1D2502A01 Datasheet, PDF (2/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
BLOCK DIAGRAM
S1D2502A01
VDD ₃₁
VSS ²⁸
VCC3 ¹¹
GND3 9
VREF1 4
VREF 5
ABL 8
ROM
(448 x 18 x 12)
Font Data ¹²
Output Stage
9
ROM
Address
RAM
(480 x 16)
Ctrl Font
16
RAM Data
Data Receiver
Ctrl Data 16
CLK
Display
Display Ctrl ^Controller
Frame Ctrl
H_Pulse
V_Pulse
ROM Ctrl ^Control
Register
OSD
PLL
Band
Gap.Ref
ABL
R/G/B OSD ^{H/V/CLK Ctrl H/V/CLK Ctrl}
FBLK
Intensity Timing Controller Frame Ctrl
ROM Ctrl
Latches
I²C bus
decoder D/
A
RGB OSD
Multi (3 mode)
Half Tone
FBL _BLK
INTE
BLK
Int
R cut off
V/I
HT DET.
Clamp
G cut off
V/I
CLP
Pulse ^HFLB
Gen.
B cut off
V/I
CONT_CAP 7
RIN 12
GND1 15
Video
Input
Clamp
CLP
R OSD
VCC1 13
OSD
Input
Cilp.
HT
DET.
Video
Half Tone
SW
FBLK
I²C
Sub
Cont.
Control
I²C
OSD
Half Tone
SW
FBLK
I²C
OSD
Cont.
Control
I²C
Video
Contras
+
t
Sub
Cont.
Control
Amp
Out
BLK
I²C Cont. Cntl
Birght
Control
I²C CLP
GIN 14
G OSD
BIN 16
CLP HT DET. FBLK
B OSD
CLP HT DET. FBLK
G-CHANNEL
B-CHANNEL
I²C
CLP BLK
I²C
CLP BLK
6 VDDA
2 VSSA
32 HFLB
1 VFLB
3 VCO_IN_P
30 SDA
29 SCL
27 RCT
26 GCT
25 BCT
10 CLP_IN
24 R OUT
22 VCC2
23 R CLP
19 ^GND2
20 ^{G CLP}
21 G OUT
17 B CLP
18 B OUT
Figure 1. Functional Block Diagram
1