DS_S1D2502A01 Datasheet, PDF (4/57 Pages) Samsung semiconductor – VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
S1D2502A01
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
VFLB
VSSA
VCO_IN_P
VREF1
VREF
VDDA
CONT_CAP
ABL
GND3
CLP_IN
VCC3
RIN
VCC1
GIN
GND1
BIN
BCLP
BOUT
GND2
GCLP
GOUT
VCC2
RCLP
ROUT
BCT
GCT
RCT
VSS
SCL
SDA
VDD
HFLB
Table 1. Pin Configuration
I/O
Configuration
I
Vertical flyback signal
-
Ground (PLL part)
I
This voltage is generated at the external loop filter and goes into the
input stage of the VCO.
O
Charge pump output
O
PLL regulator filter
-
+5V supply voltage for PLL part
-
Contrast control for AMP part
-
Auto beam limit.
-
Ground for video AMP part(for AMP control)
-
Video clamp pulse input
-
+12V supply voltage for video AMP part(for AMP control)
I
Video signal input (red)
-
+12V supply voltage for video AMP(for main video signal process)
I
Video signal input (green)
-
Ground for video AMP part(for main video signal process)
I
Video signal input (blue)
-
B output clamp cap
O
Video signal output (blue)
-
Ground for video AMP part(for video output drive)
-
G output clamp cap
O
Video signal output (green)
-
+12V supply voltage for video AMP part(for video output drive)
-
R output clamp cap
O
Video signal output (red)
-
B cut-off output
-
G cut-off output
-
R cut-off output
-
Ground for digital part
I
Serial clock (I²C)
I/O
Serial data (I²C)
-
+5V supply voltage for digital part
I
Horizontal flyback signal
3