K4R271669B Datasheet, PDF (5/20 Pages) Samsung semiconductor – 256K x 16/18 bit x 32s banks Direct RDRAMTM

K4R271669B/K4R441869B
Direct RDRAM^™
Signal
SIO1,SIO0
CMD
I/O Type
# of
Pins
I/O CMOS^a 2
I
CMOS^a 1
SCK
I
CMOS^a 1
V_DD
10
V_DDa
1
V_CMOS
2
GND
13
GNDa
1
DQA8..DQA0
I/O RSL^b
9
CFM
CFMN
I
RSL^b
1
I
RSL^b
1
V_REF
CTMN
1
I
RSL^b
1
CTM
I
RSL^b
1
RQ7..RQ5 or
I
RSL^b
3
ROW2..ROW0
RQ4..RQ0 or
I
RSL^b
5
COL4..COL0
DQB8..
DQB0
I/O RSL^b
9
Total pin count per package
62
Table 2: Pin Description
Description
Serial input/output. Pins for reading from and writing to the control regis-
ters using a serial access protocol. Also used for power management.
Command input. Pins used in conjunction with SIO0 and SIO1 for reading
from and writing to the control registers. Also used for power manage-
ment.
Serial clock input. Clock source used for reading from and writing to the
control registers
Supply voltage for the RDRAM core and interface logic.
Supply voltage for the RDRAM analog circuitry.
Supply voltage for CMOS input/output pins.
Ground reference for RDRAM core and interface.
Ground reference for RDRAM analog circuitry.
Data byte A. Nine pins which carry a byte of read or write data between
the Channel and the RDRAM. DQA8 is not used (no connection) by
RDRAMs with a x16 organization.
Clock from master. Interface clock used for receiving RSL signals from
the Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from
the Channel. Negative polarity
Logic threshold reference voltage for RSL signals
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Row access control. Three pins containing control and address informa-
tion for row accesses.
Column access control. Five pins containing control and address informa-
tion for column accesses.
Data byte B. Nine pins which carry a byte of read or write data between
the Channel and the RDRAM. DQB8 is not used (no connection) by
RDRAMs with a x16 organization.
a. All CMOS signals are high-true; a high voltage is a logic one and a low voltage is logic zero.
b. All RSL signals are low-true; a low voltage is a logic one and a high voltage is logic zero.
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Version 1.11 Oct. 2000