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K4R271669B Datasheet, PDF (14/20 Pages) Samsung semiconductor – 256K x 16/18 bit x 32s banks Direct RDRAMTM
K4R271669B/K4R441869B
Timing Conditions
Table 11: Timing Conditions
Symbol
tCYCLE
tCR, tCF
tCH, tCL
tTR
tDCW
tDR, tDF
tS, tH
tDR1, tDF1
tDR2, tDF2
tCYCLE1
tCH1, tCL1
tS1
tH1
tS2
tH2
tS3
tH3
tS4
tH4
tNPQ
tREADTOCC
tCCSAMTOREAD
tCE
tCD
tFRM
tNLIMIT
Parameter
CTM and CFM cycle times (-800)
CTM and CFM cycle times (-711)
CTM and CFM cycle times (-600)
CTM and CFM input rise and fall times. Use the minimum value
of these parameters during testing.
CTM and CFM high and low times
CTM-CFM differential (MSE/MS=0/0)
CTM-CFM differential (MSE/MS=1/1)
Domain crossing window
DQA/DQB/ROW/COL input rise/fall times (20% to 80%). Use
the minimum value of these parameters during testing.
DQA/DQB/ROW/COL-to-CFM set/hold @ tCYCLE=2.50ns
DQA/DQB/ROW/COL-to-CFM set/hold @ tCYCLE=2.81ns
DQA/DQB/ROW/COL-to-CFM set/hold @ tCYCLE=3.33ns
SIO0, SIO1 input rise and fall times
CMD, SCK input rise and fall times
SCK cycle time - Serial control register transactions
SCK cycle time - Power transitions
SCK high and low times
CMD setup time to SCK rising or falling edgee
CMD hold time to SCK rising or falling edgee
SIO0 setup time to SCK falling edge
SIO0 hold time to SCK falling edge
PDEV setup time on DQA5..0 to SCK rising edge.
PDEV hold time on DQA5..0 to SCK rising edge.
ROW2..0, COL4..0 setup time for quiet window
ROW2..0, COL4..0 hold time for quiet windowf
Quiet on ROW/COL bits during NAP/PDN entry
Offset between read data and CC packets (same device)
Offset between CC packet and read data (same device)
CTM/CFM stable before NAP/PDN exit
CTM/CFM stable after NAP/PDN entry
ROW packet to COL packet ATTN framing delay
Maximum time in NAP mode
Min
2.50
2.80
3.33
0.2
40%
0.0
0.9
-0.1
0.2
0.200b
0.240c,d
0.275b,d
-
-
1000
10
4.25
1.25
1
40
40
0
5.5
-1
5
4
12
8
2
100
7
Direct RDRAM™
Max
3.83
3.83
3.83
0.5
60%
1.0
1.0
0.1
0.65
-
-
-
5.0
2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10.0
Unit
ns
Figure(s)
Figure 55
ns
tCYCLE
tCYCLE
tCYCLE
ns
ns
Figure 55
Figure 55
Figure 43
Figure 55
Figure 61
Figure 56
Figure 56
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
µs
Figure 58
Figure 58
Figure 58
Figure 58
Figure 58
Figure 58
Figure 58
Figure 58
Figure 58
Figure 49
Figure 59
Figure 49
Figure 49
Figure 48
Figure 53
Figure 53
Figure 49
Figure 48
Figure 47
Figure 46
Page 12
Version 1.11 Oct. 2000