UM_S3C2501X Datasheet, PDF (434/465 Pages) Samsung semiconductor – 32-BIT RISC MICROPROCESSOR

S3C2501X
I/O PORTS
12.3.6 I/O PORT DATA REGISTER (IOPDATA1/2)
The I/O port data registers, IOPDATA1/2, contain one-bit read values for I/O ports that are configured to input
mode and one-bit write values for ports that are configured to output mode.
Register
IOPDATA1
IOPDATA2
Address
0xF003001C
0xF0030020
Table 12-7. IOPDATA1/2 Register
R/W
R/W
R/W
Description
I/O port data register for port 0 to 31
I/O port data register for port 32 to 63
Reset Value
Undefined
Undefined
12.3.7 I/O PORT DRIVE CONTROL REGISTER (IOPDRV1/2)
The I/O port drive control registers, IOPDRV1/2, control the pad type for which is operating as a tri-state output
mode or an open-drain output mode. This register's each bit value programmed as write ‘1’ value for open-drain
output mode or write ‘0’ value for tri-state output mode.
Register
IOPDRV1
IOPDRV2
Address
0xF0030024
0xF0030028
Table 12-8. IOPDRV1/2 Register
R/W
R/W
R/W
Description
I/O port drive control register for port 0 to 31
I/O port drive control register for port 32 to 63
Reset Value
0x00000000
0x00000000
12-11