M393B1K73DH0 Datasheet, PDF (38/56 Pages) Samsung semiconductor – 240pin Registered DIMM

Registered DIMM
datasheet
[ Table 18 ] DDR3-1600 Speed Bins
Speed
CL-nRCD-nRP
Parameter
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CL = 7
CL = 8
CL = 9
CL = 10
CL = 11
Supported CL Settings
Supported CWL Settings
CWL = 5
CWL = 6
CWL = 7, 8
CWL = 5
CWL = 6
CWL = 7
CWL = 8
CWL = 5
CWL = 6
CWL = 7
CWL = 8
CWL = 5,6
CWL = 7
CWL = 8
CWL = 5,6
CWL = 7
CWL = 8
CWL = 5,6,7
CWL = 8
Symbol
tAA
tRCD
tRP
tRC
tRAS
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
DDR3-1600
11-11-11
min
max
13.75
(13.125)⁹
20
13.75
(13.125)⁹
-
13.75
(13.125)⁹
-
48.75
(48.125)⁹
-
35
9*tREFI
2.5
3.3
Reserved
Reserved
Reserved
1.875
<2.5
Reserved
Reserved
Reserved
1.875
<2.5
Reserved
Reserved
Reserved
1.5
<1.875
Reserved
Reserved
1.5
<1.875
Reserved
Reserved
1.25
<1.5
6,7,8,9,10,11
5,6,7,8
Rev. 1.3
DDR3 SDRAM
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nCK
nCK
NOTE
1,2,3,7
1,2,3,4,7
4
4
1,2,3,4,7
1,2,3,4,7
4
4
1,2,3,7
1,2,3,4,7
1,2,3,4
4
1,2,3,4,7
1,2,3,4
4
1,2,3,7
1,2,3,4
4
1,2,3,9
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