M393B1K73DH0 Datasheet, PDF (37/56 Pages) Samsung semiconductor – 240pin Registered DIMM

Registered DIMM
datasheet
[ Table 16 ] DDR3-1066 Speed Bins
Speed
CL-nRCD-nRP
Parameter
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CWL = 5
CWL = 6
CL = 7
CWL = 5
CWL = 6
CL = 8
CWL = 5
CWL = 6
Supported CL Settings
Supported CWL Settings
Symbol
tAA
tRCD
tRP
tRC
tRAS
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
min
13.125
13.125
13.125
50.625
37.5
2.5
1.875
1.875
DDR3-1066
7-7-7
Reserved
Reserved
Reserved
6,7,8
5,6
max
20
-
-
-
9*tREFI
3.3
<2.5
<2.5
Rev. 1.3
DDR3 SDRAM
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nCK
nCK
NOTE
1,2,3,5
1,2,3,4
4
1,2,3,4,9
4
1,2,3
[ Table 17 ] DDR3-1333 Speed Bins
Speed
CL-nRCD-nRP
Parameter
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CWL = 5
CL = 6
CWL = 6
CWL = 7
CWL = 5
CL = 7
CWL = 6
CWL = 7
CWL = 5
CL = 8
CWL = 6
CWL = 7
CL = 9
CWL = 5,6
CWL = 7
CL = 10
CWL = 5,6
CWL = 7
Supported CL Settings
Supported CWL Settings
Symbol
tAA
tRCD
tRP
tRC
tRAS
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
DDR3-1333
9 -9 - 9
min
13.5 (13.125)⁹
13.5 (13.125)⁹
13.5 (13.125)⁹
49.5 (49.125)⁹
36
2.5
Reserved
Reserved
Reserved
1.875
Reserved
Reserved
1.875
Reserved
Reserved
1.5
Reserved
Reserved
6,7,8,9
5,6,7
max
20
-
-
-
9*tREFI
3.3
<2.5
<2.5
<1.875
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nCK
nCK
NOTE
1,2,3,6
1,2,3,4,6
4
4
1,2,3,4,6
1,2,3,4
4
1,2,3,6
1,2,3,4
4
1,2,3,4,9
4
1,2,3
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