M393B1K73DH0 Datasheet, PDF (36/56 Pages) Samsung semiconductor – 240pin Registered DIMM

Registered DIMM
datasheet
18. Electrical Characteristics and AC timing
(0 °C<T_CASE ≤95 °C, V_DDQ = 1.5V ± 0.075V; V_DD = 1.5V ± 0.075V)
Rev. 1.3
DDR3 SDRAM
18.1 Refresh Parameters by Device Density
Parameter
Symbol
1Gb
All Bank Refresh to active/refresh cmd time
tRFC
110
Average periodic refresh interval
0 °C ≤ T_CASE ≤ 85°C
7.8
tREFI
85 °C < T_CASE ≤ 95°C
3.9
2Gb
160
7.8
3.9
4Gb
260
7.8
3.9
8Gb
Units NOTE
350
ns
7.8
μs
3.9
μs
1
NOTE :
1. Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options or requirements referred to in
this material.
18.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Speed
Bin (CL - tRCD - tRP)
Parameter
CL
tRCD
tRP
tRAS
tRC
tRRD
tFAW
DDR3-800
6-6-6
min
6
15
15
37.5
52.5
10
40
DDR3-1066
7-7-7
min
7
13.13
13.13
37.5
50.63
7.5
37.5
DDR3-1333
9-9-9
min
9
13.5
13.5
36
49.5
6.0
30
DDR3-1600
11-11-11
min
11
13.75
13.75
35
48.75
6.0
30
DDR3-1866
13-13-13
min
13
13.91
13.91
34
47.91
5.0
27
Units NOTE
tCK
ns
ns
ns
ns
ns
ns
18.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
[ Table 15 ] DDR3-800 Speed Bins
Speed
CL-nRCD-nRP
Parameter
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6 / CWL = 5
Supported CL Settings
Supported CWL Settings
Symbol
tAA
tRCD
tRP
tRC
tRAS
tCK(AVG)
DDR3-800
6-6-6
min
max
15
20
15
-
15
-
52.5
-
37.5
9*tREFI
2.5
3.3
6
5
Units
ns
ns
ns
ns
ns
ns
nCK
nCK
NOTE
1,2,3
- 36 -