H8S2214 Datasheet, PDF (923/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Appendix D Pin States
Port Name
Pin Name
MCU
Power-
Operating On
Manual
Mode
Reset Reset
Hardware Software
Standby Standby Mode,
Mode
Watch Mode
Bus-
Released
State
Program Execution
State, Sleep Mode,
Subsleep Mode
PF2/WAIT
4 to 6
T
keep
T
[WAITE = 0]
keep
[WAITE = 1]
T
[WAITE = 0] [WAITE = 0]
keep
I/O port
[WAITE = 1] [WAITE = 1]
T
WAIT
7
T
keep
T
keep
keep
I/O port
PF1/BACK
4 to 6
T
keep
T
[BRLE = 0]
L
keep
[BRLE = 1]
H
[BRLE = 0]
I/O port
[BRLE = 1]
BACK
7
T
keep
T
keep
keep
I/O port
PF0/BREQ/IREQ2
4 to 6
T
keep
T
[BRLE = 0]
T
keep
[BRLE = 1]
T
[BRLE = 0]
I/O port
[BRLE = 1]
BREQ
7
T
keep
T
keep
keep
I/O port
PG4/CS0
4, 5
H
keep
T
6
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
[DDR = 0]
Input port
[DDR = 1]
CS0
(In sleep mode and
subsleep mode: H)
7
T
keep
T
keep
keep
I/O port
PG3/CS1
PG2/CS2
PG1/CS3/IRQ7
4 to 6
T
keep
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
[DDR = 0]
Input port
[DDR = 1]
CS1 to CS3
7
T
keep
T
keep
keep
I/O port
PG0/IRQ6
4 to 7
T
keep
T
keep
keep
I/O port
Legend:
H:
High level
L:
Low level
T:
High impedance
keep: Input port becomes high-impedance, output port retains state
DDR Data direction register
OPE: Output port enable
WAITE: Wait input enable
BRLE: Bus release enable
Note: * L in modes 4 and 5 (address output)
Rev.4.00 Sep. 18, 2008 Page 863 of 872
REJ09B0189-0400