H8S2214 Datasheet, PDF (525/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 12 Serial Communication Interface (SCI)
Bit 5—Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.
Bit 5
TE
Description
0
Transmission disabled^*1
1
Transmission enabled^*2
(Initial value)
Notes: 1. The TDRE flag in SSR is fixed at 1.
2. In this state, serial transmission is started when transmit data is written to TDR and the
TDRE flag in SSR is cleared to 0.
SMR setting must be performed to decide the transfer format before setting the TE bit
to 1.
Bit 4—Receive Enable (RE): Enables or disables the start of serial reception by the SCI.
Bit 4
RE
Description
0
Reception disabled^*1
1
Reception enabled^*2
(Initial value)
Notes: 1. Clearing the RE bit to 0 does not affect the RDRF, FER, PER, and ORER flags, which
retain their states.
2. Serial reception is started in this state when a start bit is detected in asynchronous
mode or serial clock input is detected in clocked synchronous mode.
SMR setting must be performed to decide the transfer format before setting the RE bit
to 1.
Bit 3—Multiprocessor Interrupt Enable (MPIE): Enables or disables multiprocessor interrupts.
The MPIE bit setting is only valid in asynchronous mode when the MP bit in SMR is set to 1.
The MPIE bit setting is invalid in clocked synchronous mode or when the MP bit is cleared to 0.
Rev.4.00 Sep. 18, 2008 Page 465 of 872
REJ09B0189-0400