H8S2214 Datasheet, PDF (665/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 16 Clock Pulse Generator
Section 16 Clock Pulse Generator
16.1 Overview
The H8S/2214 Group has an on-chip clock pulse generator (CPG) that generates the system clock
(φ), the bus master clock, and internal clocks.
The clock pulse generator consists of a system clock oscillator, duty adjustment circuit, medium-
speed clock divider, and bus master clock selection circuit.
16.1.1 Block Diagram
Figure 16.1 shows a block diagram of the clock pulse generator.
EXTAL
XTAL
System
clock
oscillator
LPWRCR
RFCUT
Duty
adjustment
circuit
SCKCR
SCK2 to SCK0
Medium-
speed
clock divider
φ/2 to
φ/32
φ
Bus
master
clock
selection
circuit
System clock Internal clock to
to φ pin
supporting modules
Bus master clock
to CPU, DTC,
and DMAC
Legend:
LPWRCR: Low-power control register
SCKCR: System clock control register
Figure 16.1 Block Diagram of Clock Pulse Generator
Rev.4.00 Sep. 18, 2008 Page 605 of 872
REJ09B0189-0400