H8S2214 Datasheet, PDF (497/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 11 Watchdog Timer (WDT)
Section 11 Watchdog Timer (WDT)
11.1 Overview
The H8S/2214 Group has an on-chip watchdog timer/watch timer with one channel. The watchdog
timer can generate an internal interrupt or an internal reset signal if a system crash prevents the
CPU from writing to the counter, allowing it to overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer mode, an interval timer interrupt is generated each time the counter overflows.
11.1.1 Features
WDT features are listed below.
• Switchable between watchdog timer mode and interval timer mode
• Internal reset or internal interrupt generated when watchdog timer mode
Choice of whether or not an internal reset (power-on reset or manual reset selectable) is
effected when the counter overflows
• Interrupt generation in interval timer mode
⎯ An interval timer interrupt is generated when the counter overflows
• Choice of 8 counter input clocks
⎯ Maximum WDT interval: system clock period × 131072 × 256
Rev.4.00 Sep. 18, 2008 Page 437 of 872
REJ09B0189-0400