H8S2214 Datasheet, PDF (631/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 15 ROM
15.9 Programming/Erasing Flash Memory
A software method, using the CPU, is employed to program and erase flash memory in the on-
board programming modes. There are four flash memory operating modes: program mode, erase
mode, program-verify mode, and erase-verify mode. Transitions to these modes are made by
setting the PSU1, ESU1, P1, E1, PV1, and EV1 bits in FLMCR1 for addresses H'000000 to
H'01FFFF.
The flash memory cannot be read while it is being written or erased. Install the program to control
flash memory programming and erasing (programming control program) in the on-chip RAM, in
external memory, and execute the program from there.
Notes: 1. Operation is not guaranteed if bits SWE1, ESU1, PSU1, EV1, PV1, E1, and P1 of
FLMCR1 are set/reset by a program in flash memory in the corresponding address
areas.
2. When programming or erasing, set FWE to 1 (programming/erasing will not be
executed if FWE = 0).
3. Programming should be performed in the erased state. Do not perform additional
programming on previously programmed addresses.
15.9.1 Program Mode
Follow the procedure shown in the program/program-verify flowchart in figure 15.10 to write data
or programs to flash memory. Performing program operations according to this flowchart will
enable data or programs to be written to flash memory without subjecting the device to voltage
stress or sacrificing program data reliability. Programming should be carried out 128 bytes at a
time.
For the wait times (t_sswe, t_spsu, t_sp10, t_sp30, t , _sp200 t_cp, t_cpsu, t_spv, t_spvr, t_cpv, t_cswe) after bits are set or cleared in
flash memory control register 1 (FLMCR1) and the maximum number of programming operations
(N), see section 18.6, Flash Memory Characteristics.
Following the elapse of tsswe µs or more after the SWE1 bit is set to 1 in flash memory control
register 1 (FLMCR1), 128-byte data is stored in the program data area and reprogram data area,
and the 128-byte data in the program data area in RAM is written consecutively to the write
addresses. The lower 8 bits of the first address written to must be H'00 or H'80. 128 consecutive
byte data transfers are performed. The program address and program data are latched in the flash
memory. A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this
case, H'FF data must be written to the extra addresses.
Rev.4.00 Sep. 18, 2008 Page 571 of 872
REJ09B0189-0400