H8S2214 Datasheet, PDF (581/936 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 12 Serial Communication Interface (SCI)
Table 12.14 State of SSR Status Flags and Transfer of Receive Data
RDRF
1
0
0
1
1
0
1
SSR Status Flags
ORER FER PER
1
0
0
0
1
0
0
0
1
1
1
0
1
0
1
0
1
1
1
1
1
Receive Data Transfer
RSR to RDR
X
X
X
X
Legend:
: Receive data is transferred from RSR to RDR.
X: Receive data is not transferred from RSR to RDR.
Receive Error Status
Overrun error
Framing error
Parity error
Overrun error + framing error
Overrun error + parity error
Framing error + parity error
Overrun error + framing error +
parity error
(4) Break Detection and Processing (Asynchronous Mode Only)
When framing error (FER) detection is performed, a break can be detected by reading the RxD pin
value directly. In a break, the input from the RxD pin becomes all 0s, and so the FER flag is set,
and the parity error flag (PER) may also be set.
Note that, since the SCI continues the receive operation after receiving a break, even if the FER
flag is cleared to 0, it will be set to 1 again.
(5) Sending a Break (Asynchronous Mode Only)
The TxD pin has a dual function as an I/O port whose direction (input or output) is determined by
DR and DDR. This can be used to send a break.
Between serial transmission initialization and setting of the TE bit to 1, the mark state is replaced
by the value of DR (the pin does not function as the TxD pin until the TE bit is set to 1).
Consequently, DDR and DR for the port corresponding to the TxD pin are first set to 1.
To send a break during serial transmission, first clear DR to 0, then clear the TE bit to 0.
When the TE bit is cleared to 0, the transmitter is initialized regardless of the current transmission
state, the TxD pin becomes an I/O port, and 0 is output from the TxD pin.
Rev.4.00 Sep. 18, 2008 Page 521 of 872
REJ09B0189-0400