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HD404328 Datasheet, PDF (88/96 Pages) Hitachi Semiconductor – 4 BIT SINGLE CHIP MICROCOMPUTER
HD404328 Series
Item
Symbol Pin(s)
Min Typ Max Unit Test Conditions
Note
RESET high width
RESET fall time
Input capacitance
tRSTH
tRSTf
Cin
RESET
2
——
RESET
—
—
20
All pins except —
—
30
D10, AN0–AN3
D10
—
—
30
fcyc
6
ms
6
pF f = 1 MHz, Vin = 0.0 V
pF HD404324,
HD404324U,
HD404326,
HD404326U,
HD404328,
HD404328U:
f = 1 MHz,
Vin = 0.0 V
—
— 180
pF HD4074329,
HD4074329U:
f = 1 MHz,
Vin = 0.0 V
Notes: 1. If fOSC = 0.4 MHz to 1.0 MHz, bit 3 of the miscellaneous register (MIS: $00C) must be set to 1; if
fOSC = 1.6 MHz to 4.5 MHz, bit 3 must be set to 0. Do not use fOSC = 1.0 MHz to1.6 MHz with 32-
kHz oscillation.
2. The oscillation stabilization time is the time required for the oscillator to stabilize after VCC
reaches 2.7 V (2.9 V for the HD4074329 and HD4074329U, or 3.5 V if VCC = 3.5 V to 5.5 V) at
power-on or after RESET input goes high after stop mode is canceled. At power-on and when
stop mode is cancelled, RESET must be input for at least tRC to ensure the oscillation
stabilization time. If using a crystal oscillator or a ceramic oscillator, contact its manufacturer to
determine what stabilization time is required, since it will depend on the circuit constants and
stray capacitances.
3. The oscillation stabilization time is the time required for the oscillator to stabilize after VCC
reaches 2.7 V (2.9 V for the HD4074329 and HD4074329U) at power-on—at least tRC must be
ensured. If using a 32.768-kHz crystal oscillator, contact its manufacturer to determine what
stabilization time is required, since it will depend on the circuit constants and stray capacitances.
4. Refer to figure 49.
5. Refer to figure 50. The tcyc unit applies when the MCU is in standby or active mode.
The tsubcyc unit applies when the MCU is in watch or subactive mode. tsubcyc = 244.14 µs (32.768-
kHz crystal)
6. Refer to figure 51.
86