HD404328 Datasheet, PDF (22/96 Pages) Hitachi Semiconductor – 4 BIT SINGLE CHIP MICROCOMPUTER

HD404328 Series
Instruction cycles
1
2
3
4
5
6
Instruction
execution
Interrupt
acceptance
Stacking;
IE reset
Stacking;
vector address
generation
Execution of JMPL
instruction at vector address
The stack is accessed and the IE reset after the instruction
is executed, even if it is a two-cycle instruction.
Figure 7 Interrupt Processing Sequence
Execution of
instruction at
start address
of interrupt
routine
20