HD404328 Datasheet, PDF (27/96 Pages) Hitachi Semiconductor – 4 BIT SINGLE CHIP MICROCOMPUTER

Table 14
IMZC
0
1
Zero-Crossing Interrupt Mask
Interrupt Request
Enabled
Disabled (Masked)
HD404328 Series
A/D Interrupt Request Flag (IFAD: $003, Bit 2): Set at the completion of A/D conversion, as shown in
table 15.
Table 15 A/D Interrupt Request Flag
IFAD
0
1
Interrupt Request
No
Yes
A/D Interrupt Mask (IMAD: $003, Bit 3): Prevents (masks) an interrupt request caused by the A/D
interrupt request flag, as shown in table 16.
Table 16 A/D Interrupt Mask
IMAD
0
1
Interrupt Request
Enabled
Disabled (Masked)
Serial Interrupt Request Flag (IFS: $023, Bit 2): Set when the octal counter counts the eighth transmit
clock signal or when data transfer is discontinued by resetting the octal counter (table 17).
Table 17 Serial Interrupt Request Flag
IFS
Interrupt Request
0
No
1
Yes
Serial Interrupt Mask (IMS: $023, Bit 3): Prevents (masks) an interrupt request caused by the serial
interrupt request flag, as shown in table 18.
Table 18 Serial Interrupt Mask
IMS
Interrupt Request
0
Enabled
1
Disabled (Masked)
25