HD404328 Datasheet, PDF (68/96 Pages) Hitachi Semiconductor – 4 BIT SINGLE CHIP MICROCOMPUTER

HD404328 Series
Zero-Crossing Detection Circuit
The MCU has a zero-crossing detection circuit that generates a digital signal in synchronism with an AC
signal input to the ZCD pin through an external capacitor. A block diagram of the zero-crossing detection
circuit is shown in figure 41.
The zero-crossing detection circuit has two modes (low sensitivity mode and high sensitivity mode) which
are set by port mode register B (PMRB: $011) as shown in table 33.
A digital signal generated by the zero-crossing detection circuit sets the zero-crossing interrupt request flag
(IFZC). The interrupt edge is selected by the interrupt mode register (IMR: $010). This signal can be
made as the input clock of timer B by setting the input clock source of timer mode register B (TMB: $009)
for external event input.
Note:
After MCU reset, the D₈/ZCD/EVENT pin is set to ZCD. With this setting, a supply current (bias
current) always flows because a bias circuit within the zero-crossing circuit is still operating. This
current flows in all MCU operation modes, but it is particularly critical in stop mode because the
MCU is more affected by bias current since the other circuits of the LSI are not dissipating much
current. If the zero-crossing detection function is not being used, use port mode register B to set
this pin to D₈ or EVENT. This prevents the bias current from flowing.
D₈ port input
AC input
signal
D8/ZCD/
EVENT pin
MPX
External
capacitor
Zero-crossing
detection circuit
MPX
MPX
EVENT
(Refer to
figure 27.)
MPX
IFZC
2
Port mode register B
2
Interrupt mode register
Figure 41 Block Diagram of Zero-Crossing Detection Circuit
Table 33 Port Mode Register B
PMRB
1
0
Port Selection
0
0
ZCD (low sensitivity mode)
1
ZCD (high sensitivity mode)*
1
0
D₈
1
EVENT
Note: * Becomes low sensitivity in subactive mode.
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