HD404829R Datasheet, PDF (85/149 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a LCD controller/Driver Circuit

HD404829R Series
SO
SCK
Idle controll
logic
I/O controll
logic
Octal
counter (OC)
Clock
Serial interrupt
request flag
(IFS)
Serial data
register (SRL/U)
SI
System ^øPER
clock
1/2
÷2
÷8
1/2
÷32
÷128
÷512
÷2048
Data bus
Clock line
Signal line
Transfer
control
Serial mode
register A
(SMRA)
Serial mode
register B
(SMRB)
Figure 70 Block Diagram of Serial Interface
Serial Interface Operation
Selecting and Changing the Operating Mode: table 22 lists the serial interface’s operating modes. To
select an operating mode, use one of these combinations of port mode register A (PMRA: $004) and serial
mode register A (SMRA: $005) settings; to change the operating mode, always initialize the serial interface
internally by writing data to serial mode register A. Note that the serial interface is initialized by writing
data to serial mode register A. Refer to the following Serial Mode Register A section for details.
Pin Setting: The R2₁/SCK pin is controlled by writing data to serial mode register A (SMRA: $005). The
R2₂/SI and R2₃/SO pins are controlled by writing data to port mode register A (PMRA: $004). Refer to the
following Registers for Serial Interface section for details.
Transmit Clock Source Setting: The transmit clock source is set by writing data to serial mode register A
(SMRA: $005) and serial mode register B (SMRB: $028). Refer to the following Registers for Serial
Interface section for details.
Data Setting: Transmit data is set by writing data to the serial data register (SRL: $006, SRU: $007).
Receive data is obtained by reading the contents of the serial data register. The serial data is shifted by the
transmit clock and is input from or output to an external system.
The output level of the SO pin is invalid until the first data is output after MCU reset, or until the output
level control in idle states is performed.
83