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| HD404829R Datasheet, PDF (62/149 Pages) Renesas Technology Corp – AS Microcomputer Incorporating a LCD controller/Driver Circuit | |||
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HD404829R Series
Timer mode register A (TMA: $008)
Bit
Initial value
Read/Write
Bit name
3
0
W
TMA3
2
0
W
TMA2
1
0
W
TMA1
0
0
W
TMA0
Source Input clock
TMA3 TMA2 TMA1 TMA0 prescaler frequency
Operating mode
0
0
0
0 PSS
2048tcyc
Timer A mode
1 PSS
1024tcyc
1
0 PSS
512tcyc
1 PSS
128tcyc
1
0
0 PSS
32tcyc
1 PSS
8tcyc
1
0 PSS
4tcyc
1 PSS
2tcyc
1
0
0
0 PSW
32tWcyc
Time-base mode
1 PSW
16tWcyc
1
0 PSW
8tWcyc
1 PSW
2tWcyc
1
0
0â
1/2tWcyc
1â
Not used
1 !â
Reset PSW and TCA
! : Donât care
Note: 1. tWcyc = 244.14 µs (when a 32.768-kHz crystal oscillator is used)
2. Timer counter overflow output period (seconds) = input clock period (seconds) Ã 256.
3. If PSW of TCA reset is selected while the LCD is operating, LCD operation halts (power switch
goes off and all SEG and COM pins are grounded).
When an LCD is connected for display, the PSW and TCA reset periods must be set in the
program to the minimum.
4. The division ratio must not be modified during time-base mode operation, otherwise an overflow
cycle error will occur.
Figure 44 Timer Mode Register A (TMA)
60
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