H8SX1622 Datasheet, PDF (793/1056 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 20 D/A Converter
20.3.2 D/A Control Register 01 (DACR01)
DACR01 controls the operation of the D/A converter.
Bit
7
6
5
4
3
2
1
0
Bit Name DAOE1
DAOE0
DAE





Initial Value
0
0
0
1
1
1
1
1
R/W
R/W
R/W
R/W
R
R
R
R
R
Initial
Bit
Bit Name Value
7
DAOE1 0
6
DAOE0 0
5
DAE
0
4 to 0 
All 1
R/W
R/W
R/W
R/W
R
Description
D/A Output Enable 1
Controls D/A conversion and analog output.
0: Analog output of channel 1 (DA1) is disabled
1: D/A conversion of channel 1 is enabled. Analog output
of channel 1 (DA1) is enabled.
D/A Output Enable 0
Controls D/A conversion and analog output.
0: Analog output of channel 0 (DA0) is disabled
1: D/A conversion of channel 0 is enabled. Analog output
of channel 0 (DA0) is enabled.
D/A Enable
Used together with the DAOE0 and DAOE1 bits to control
D/A conversion. When this bit is cleared to 0, D/A
conversion is controlled independently for channels 0 and
1. When this bit is set to 1, D/A conversion for channels 0
and 1 is controlled together.
Output of conversion results is always controlled by the
DAOE0 and DAOE1 bits. For details, see table 20.2,
Control of D/A Conversion.
Reserved
These are read-only bits and cannot be modified.
Rev. 1.00 Nov. 01, 2007 Page 765 of 1024
REJ09B0414-0100