H8SX1622 Datasheet, PDF (133/1056 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 6 Interrupt Controller
6.2 Input/Output Pins
Table 6.1 shows the pin configuration of the interrupt controller.
Table 6.1 Pin Configuration
Name
NMI
IRQ15 to IRQ0
I/O
Input
Input
Function
Nonmaskable External Interrupt
Rising or falling edge can be selected.
Maskable External Interrupts
Rising, falling, or both edges, or level sensing, can be
independently selected.
6.3 Register Descriptions
The interrupt controller has the following registers.
• Interrupt control register (INTCR)
• CPU priority control register (CPUPCR)
• Interrupt priority registers A to I, K, L, P to R (IPRA to IPRI, IPRK, IPRL, IPRP to IPRR)
• IRQ enable register (IER)
• IRQ sense control registers H and L (ISCRH, ISCRL)
• IRQ status register (ISR)
• Software standby release IRQ enable register (SSIER)
Rev. 1.00 Nov. 01, 2007 Page 105 of 1024
REJ09B0414-0100