UPD70F3451GC-UBT-A Datasheet, PDF (713/1191 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 13 A/D CONVERTER 2
13.6 Internal Equivalent Circuit
The following figure shows the equivalent circuit of the analog input block.
ANI2n
RIN
C1
CIN
R
2.6 kΩ
C1
15 pF
C2
6.2 pF
Remarks 1. The maximum values are shown (reference values).
2. V850E/IF3: n = 0 to 3
V850E/IG3: n = 0 to 7
AD2FR3
bit
0
0
0
0
0
0
0
1
1
AD2M1 register
AD2FR2 AD2FR1
bit
bit
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
AD2FR0
bit
1
0
1
0
1
0
1
0
1
Number of A/D
conversion clocks
(fAD2)
62
93
124
155
186
217
248
279
310
Number of sampling clocks
33
49.5
66
82.5
99
115.5
132
148.5
165
Caution Number of sampling clocks is included in number of A/D conversion clocks.
Number of A/D conversion clocks (A/D conversion time)
Sampling clock
Conversion start
Conversion end
User’s Manual U18279EJ3V0UD
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