UPD70F3451GC-UBT-A Datasheet, PDF (418/1191 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
(6) TMTm I/O control register 2 (TTmIOC2)
The TTmIOC2 register is an 8-bit register that controls the valid edge for the external event count input signal
(EVTTm pin) and external trigger input signal (EVTTm pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
After reset: 00H R/W Address: TT0IOC2 FFFFF585H^Note, TT1IOC2 FFFFF5C5H
7
6
5
4
3
2
1
0
TTmIOC2
0
0
0
0 TTmEES1TTmEES0 TTmETS1 TTmETS0
V850E/IF3
m=1
TTmEES1 TTmEES0External event count input signal (EVTTm pin) valid edge setting
V850E/IG3
0
0
No edge detection (external event count invalid)
m = 0, 1
0
1
Detection of rising edge
1
0
Detection of falling edge
1
1
Detection of both edges
TTmETS1 TTmETS0 External trigger input signal (EVTTm pin) valid edge setting
0
0
No edge detection (external trigger invalid)
0
1
Detection of rising edge
1
0
Detection of falling edge
1
1
Detection of both edges
Note V850E/IG3 only
Cautions 1. Rewrite the TTmEES1, TTmEES0, TTmETS1, and TTmETS0 bits when the TTmCTL0.TTmCE
bit = 0. (The same value can be written when the TTmCE bit = 1.) If rewriting was
mistakenly performed, clear the TTmCE bit to 0 and then set the bits again.
2. The TTmEES1 and TTmEES0 bits are valid only when the TTmCTL1.TTmEEE bit = 1 or
when the external event count mode (the TTmCTL1.TTmMD3 to TTmCTL1.TTmMD0 bits =
0001) has been set.
3. The TTmETS1 and TTmETS0 bits are valid only in the external trigger pulse mode or one-
shot pulse output mode.
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User’s Manual U18279EJ3V0UD