UPD70F3451GC-UBT-A Datasheet, PDF (382/1191 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
Figure 7-35. Register Setting in Free-Running Timer Mode (1/3)
(a) TABn control register 0 (TABnCTL0)
TABnCE
TABnCTL0 0/1
0
0
0
TABnCKS2 TABnCKS1 TABnCKS0
0
0/1
0/1
0/1
Note The setting is invalid when the TABnCTL1.TABnEEE bit = 1
Select count clock^Note
0: Stop counting
1: Enable counting
(b) TABn control register 1 (TABnCTL1)
TABnCTL1
TABnEST TABnEEE
0
0
0/1
0
TABnMD2 TABnMD1 TABnMD0
0
1
0
1
1, 0, 1:
Free-running timer mode
0: Operate with count
clock selected by
TABnCKS0 to TABnCKS2 bits
1: Count on external
event count input signal
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User’s Manual U18279EJ3V0UD