HD404374 Datasheet, PDF (63/161 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip A/D Converter

HD404374/HD404384/HD404389/HD404082/HD404084 Series
R Port
The R port consists of 10 I/O pins that are addressed in 4-bit units.
Input can be performed by means of the LAR and LBR instructions, and output by means of the LRA and
LRB instructions. Output data is stored in the port data register (PDR) for each pin.
The R port output buffer is turned on and off by the R port data control registers (DCR0 to DCR2, DCR7:
$034 to $036, $03B). The DCR registers are mapped onto memory addresses (figure 25).
Port R0₀ is multiplexed as wakeup input pin WU₀. Setting of this pin as peripheral function pins is
performed by port mode register 1 (PMR1: $009) (figure 27).
Port R1₀ is multiplexed as peripheral function pin EVNB. Setting of this pin as peripheral function pins is
performed by bit 0 (PMR20) of port mode register 2 (PMR2: $00A) (figure 28).
Ports R1₃ and R2₀ are multiplexed as peripheral function pins TOB, and TOC, respectively. Setting of these
pins as peripheral function pins is performed by bits 3 (PMR23) of port mode register 2 (PMR2: $00A) and
bit 0 (PMR30) of port mode register 3 (PMR3: $00B)(figures 28 and 29).
Ports R2₁ and R2₂ are multiplexed as peripheral function pins SCK and SI/SO, respectively. Setting of
these pins as peripheral function pins is performed by bits 1 to 3 (PMR31 to PMR33) of port mode register
3 (PMR3: $00B) (figure 29).
Ports R7₀ to R7₃ are multiplexed as peripheral function pins AN₀ to AN₃ (HD404374, HD404384, and
HD404389 Series only). Setting of these pins as peripheral function pins is performed by bits 1 to 3
(AMR1 to AMR3) of the A/D mode register (AMR: $028) (see figure 64 in section 8, A/D Converter).
Port mode register 0 (PMR0: $008)
Bit
Read/Write
Initial value on reset
Bit name
3
Not used
2
Not used
1
Not used
0
W
0
PMR00
PMR00
0
1
D0/INT0 pin mode selection
D0
INT0
Figure 26 Port Mode Register 0 (PMR0: $008)
Rev.5.00, Sep.11.2003, page 63 of 161