HD404374 Datasheet, PDF (127/161 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip A/D Converter

HD404374/HD404384/HD404389/HD404082/HD404084 Series
Instruction Set
The MCU Series has 101 instructions, classified into the following 10 groups:
• Immediate instructions
• Register-to-register instructions
• RAM addressing instructions
• RAM register instructions
• Arithmetic instructions
• Compare instructions
• RAM bit manipulation instructions
• ROM addressing instructions
• Input/output instructions
• Control instructions
The functions of these instructions are listed in tables 30 to 39, and an opcode map is shown in table 40.
Table 30 Immediate Instructions
Operation
Mnemonic
Load A from immediate LAI i
Load B from immediate LBI i
Load memory from
immediate
LMID i,d
Load memory from
LMIIY i
immediate, increment Y
Operation Code
1 0 0 0 1 1 i₃ i₂ i₁ i₀
1 0 0 0 0 0 i₃ i₂ i₁ i₀
0 1 1 0 1 0 i₃ i₂ i₁ i₀
d₉ d₈ d₇ d₆ d₅ d₄ d₃ d₂ d₁ d₀
1 0 1 0 0 1 i₃ i₂ i₁ i₀
Function
i→A
i→B
i→M
Words/
Status Cycles
1/1
1/1
2/2
i → M, Y + 1 → Y NZ
1/1
Table 31 Register-Register Instructions
Operation
Mnemonic Operation Code
Function
Words/
Status Cycles
Load A from B
LAB
0001001000
B→A
1/1
Load B from A
LBA
0011001000
A→B
1/1
Load A from W
LAW
0100000000
W→A
2/2*
0000000000
Load A from Y
LAY
0010101111
Y→A
1/1
Load A from SPX
LASPX
0001101000
SPX → A
1/1
Load A from SPY
LASPY
0001011000
SPY → A
1/1
Load A from MR
LAMR m
1 0 0 1 1 1 m₃ m₂ m₁ m₀
MR (m) → A
1/1
Exchange MR and A XMRA m
1 0 1 1 1 1 m₃ m₂ m₁ m₀
MR (m) ↔ A
1/1
Note: * The assembler automatically provides an operand for the second word of the LAW instruction.
Rev.5.00, Sep.11.2003, page 127 of 161