HD404374 Datasheet, PDF (56/161 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip A/D Converter

HD404374/HD404384/HD404389/HD404082/HD404084 Series
Make sure to set bit 3 of the system clock select register to 1 if the HD404374 series is being used without
the subsystem clock, and on the HD404384, HD404389, HD404082, and HD404084 series. The microcomputer
will malfunction if the setting is not 1.
System clock select register (SSR: $004)
Bit
Read/Write
Initial value on reset
Bit name
3
W
0
SSR3
2
W
0
SSR2*
1
W
0
SSR1*
0
W
0
SSR0
System clock division ratio switch
0 Division-by-4 (fcyc - fOSC/4)
1 Division-by-32 (fcyc - fOSC/32)
System clock division ratio switch
0
fosc=0.4–1.0MHz
1
fosc=1.6–8.5MHz
Subsystem clock division ratio switch
0
fSUB=fx/8
1
fSUB=fx/4
Subsystem clock stop setting
(HD404374 Series)
0 Subsystem clock operates in stop mode
1 Subsystem clock stops in stop mode
This bit must be set to 1 following power-on and reset if the HD404374 series is being
used without the subsystem clock, and on the HD404384, HD404389, HD404082, and
HD404084 series. If it is set to 0 (the initial value), malfunctioning may occur in the stop
mode.
Note: * Applies to HD404374 Series.
The CR oscillation frequency differs depending on the operating voltage and resistance value.
Set SSR1 to match the operating frequency. Note that if the frequency being used does not
match the SSR1 setting, subsystems using the 32.768 kHz oscillation frequency will not
operate correctly.
Figure 22 System Clock Select Register
Rev.5.00, Sep.11.2003, page 56 of 161