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HD404374 Datasheet, PDF (24/161 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip A/D Converter
HD404374/HD404384/HD404389/HD404082/HD404084 Series
ROM address
$0000
$000F
$0010
$003F
$0040
$03FF
$0400
$07FF
$0800
Vector addresses
(16 words)
Zero page subroutine area
(64 words)
Pattern and program area
(1,024 words) *1
Pattern and program area
(2,048 words) *2
Pattern and program area
(4,096 words) *3
$0FFF
$1000
$1FFF
$2000
Pattern and program area
(8,192 words) *4
Pattern and program area
(16,384 words) *5
ROM address
$0000
$0001
$0002
$0003
$0004
$0005
JMPL instruction
(Jump to reset routine)
JMPL instruction
(Jump to 0 routine)
JMPL instruction
(Jump to 0 routine)
$0008
$0009
JMPL instruction
(Jump to timer A routine)
$000A
$000B
JMPL instruction
(Jump to timer B routine)
$000C
$000D
JMPL instruction
(Jump to timer C routine)
$000E
JMPL instruction
$000F (Jump to A/D or serial interface routine)
Notes: *1 HD404081, HD40A4081, HD40C4081
*2 HD40372, HD40A4372, HD40C4372, HD404382,
HD40A4382, HD40C4382, HD404082, HCD404082,
HD40A4082, HD40C4082, HCD40C4082
*3 HD404374, HD40A4374, HD40C4374, HD404384,
HD40A4384, HD40C4384, HD407A4374, HD407C4374,
HD407A4384, HD407C4384, HD404084, HCD404084,
HD40A4084, HD40C4084, HCD40C4084
*4 HD404388, HD40A4388, HD40C4388
*5 HD404389, HD40A4389, HD40C4389, HD407A4389,
HD407C4389
$3FFF
Figure 1 ROM Memory Map
RAM Memory Map
The MCU has on-chip RAM comprising a memory register area, data area, and stack area. In addition to
these areas, an interrupt control bit area, special register area, and register flag area are mapped onto RAM
memory space as a RAM-mapped register area.The RAM memory map is shown in figure 2 and described
below.
After power supply has been connected, regardless of a reset, the values for the memory register,
data and stack areas will be undefined. Make sure to initialize prior to use.
Rev.5.00, Sep.11.2003, page 24 of 161