HD404374 Datasheet, PDF (128/161 Pages) Renesas Technology Corp – Low-Voltage AS Microcomputers with On-Chip A/D Converter

HD404374/HD404384/HD404389/HD404082/HD404084 Series
Table 32 RAM Address Instructions
Operation
Mnemonic Operation Code
Function
Words/
Status Cycles
Load W from immediate LWI i
0 0 1 1 1 1 0 0 i₁ i₀
i→W
1/1
Load X from immediate LXI i
1 0 0 0 1 0 i₃ i₂ i₁ i₀
i→X
1/1
Load Y from immediate LYI i
1 0 0 0 0 1 i₃ i₂ i₁ i₀
i→Y
1/1
Load W from A
LWA*
0 1 0 0 0 1 0 0 0 0 A→W
2/2*
0000000000
Load X from A
LXA
0 0 1 1 1 0 1 0 0 0 A→X
1/1
Load Y from A
LYA
0 0 1 1 0 1 1 0 0 0 A→Y
1/1
Increment Y
IY
0 0 0 1 0 1 1 1 0 0 Y+1→Y
NZ
1/1
Decrement Y
DY
0 0 1 1 0 1 1 1 1 1 Y–1→Y
NB
1/1
Add A to Y
AYY
0 0 0 1 0 1 0 1 0 0 Y+A→Y
OVF 1/1
Subtract A from Y
SYY
0 0 1 1 0 1 0 1 0 0 Y–A→Y
NB
1/1
Exchange X and SPX XSPX
0 0 0 0 0 0 0 0 0 1 X ↔ SPX
1/1
Exchange Y and SPY XSPY
0 0 0 0 0 0 0 0 1 0 Y ↔ SPY
1/1
Exchange X and SPX, XSPXY
0 0 0 0 0 0 0 0 1 1 X ↔ SPX,Y ↔ SPY
1/1
Y and SPY
Note: * The assembler automatically provides an operand for the second word of the LAW and LWA
instruction.
Rev.5.00, Sep.11.2003, page 128 of 161