7641_06 Datasheet, PDF (59/385 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

7641 Group
HARDWARE
FUNCTIONAL DESCRIPTION
φ _OUT
SYNCOUT
RD
WR
Address
Data
DMAOUT
(Port P33)
Transfer request
source (“L” active)
Transfer request source
sampling
Reset of transfer request
source sampling
LDA $zz
STA $zz
DMA transfer STA $zz (last 2 cycles) Next instruction
PC
PC + 1 ADL1, 00 PC + 2
DMA
DMA desti-
source add. nation add.
PC + 3
ADL2, 00 PC + 4
A5
A DL1
Data
85
DMA
data
DMA
data
A DL2
Data Op code 3
Fig. 33 Timing chart for cycle steal transfer caused by hardware-related transfer request
φ _OUT
SYNCOUT
RD
WR
Address
Data
DMAOUT
(Port P33)
Transfer request
source (“L” active)
Transfer request source
sampling
Reset of transfer request
source sampling
LDM #$90, $41
1 cycle 1 cycle 1 cycle
instruction instruction instruction ^{DMA transfer}
Next instruction
PC
PC + 1 PC + 2 42, 00
PC + 3
PC + 4
PC + 5
DMA
DMA desti-
source add. nation add.
PC + 6
3C
18
41
90
Op code 2 Op code 3 Op code 4
DMA
data
DMA
data
Op code 6
Fig. 34 Timing chart for cycle steal transfer caused by software trigger transfer request
Rev.2.00 Aug 28, 2006 page 42 of 113
REJ09B0336-0200