7641_06 Datasheet, PDF (272/385 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

7641 Group
APPLICATION
2.12 Clock generating circuit
2.12.5 Clock generating circuit application examples
(1) Status transition during power failure
Outline: The clock is counted up every one second by using the timer interrupt during a power
failure.
Input port
(Note)
Power failure detection signal
7641 Group
Note: A signal is detected when input to input port, interrupt
input pin, or analog input pin.
Fig. 2.12.8 Connection diagram
Specifications: •Reducing power dissipation as low as possible while maintaining clock function
•Clock: f(XIN) = 4.19 MHz, f(XCIN) = 32.768 kHz
•Port processing
Input port: Fixed to “H” or “L” level on the external
Output port: Fixed to output level that does not cause current flow to the external
(Example) When a circuit turns on LED at “L” output level, fix the
output level to “H”.
I/O port: Input port → Fixed to “H” or “L” level on the external
Output port → Output of data that does not consume current
Figure 2.12.9 shows the status transition diagram during power failure and Figure 2.12.10 shows the
setting of relevant registers.
Reset released
XIN
Power failure detected
XCIN
Internal system clock
Middle-speed
mode
High-speed mode
Low-speed mode
Change internal system ^{After detection, change internal system clock to}
clock to high-speed mode ^{low-speed mode and stop oscillating XIN-XOUT}
XCIN-XCOUT oscillation function selected
Fig. 2.12.9 Status transition diagram during power failure
Rev.2.00 Aug 28, 2006 page 141 of 148
REJ09B0336-0200