7641_06 Datasheet, PDF (337/385 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

7641 Group
APPENDIX
3.5 Control registers
Timer Y (low, high)
b7 b6 b5 b4 b3 b2 b1 b0
Timer YL, Timer YH
(TYL, TYH: addresses 2216, 2316)
b
Functions
At reset R W
0 ^{qTimer Y’s count value is set through this register.}
qTimer Y is a down-count timer.
1
1 qWhen reading this register’s address, the timer Y’s count value is ₁
read out.
2
1
3
1
4
1
5
1
6
1
7
1
Notes 1: Read and write operation to timer X must be performed for both high and low-order bytes.
2: When reading timer X, read the high-order byte first and then the low-order byte.
3: When writing to timer X, write the low-order byte first and then the high-order byte.
4: Do not read this register during the write operation, or do not write during the read operation.
Fig. 3.5.19 Structure of Timer Y
Timer i (i = 1 to 3)
b7 b6 b5 b4 b3 b2 b1 b0
Timer 1, Timer 2, Timer 3
(T1, T2, T3: addresses 2416, 2516, 2616)
b
Functions
At reset R W
0 ^{qTimer i’s count value is set through this register.}
qTimer 1 and Timer 2
1 Writing operation depends on the timers 1, 2 write control bit.
When it is “0”, the values are simultaneously written into their
2 _{latches and counters.}
When it is “1”, the values are written into only their latches.
3 _{qTimer 3}
4
The values are simultaneously written into their latches and
counters.
5
qWhen reading this register’s address, its timer’s count values are
read out.
6 ^{qThe timer causes an underflow at the count pulse following the}
count where the timer contents reaches “0016”. Then The contents
7 of latches are automatically reloaded into the timer.
(Note)
(Note)
(Note)
(Note)
(Note)
(Note)
(Note)
(Note)
Note: Timer 1 and Timer 3’s values are “FF16”. Timer 2 ’s value are “0116”.
Fig. 3.5.20 Structure of Timer i
Rev.2.00 Aug 28, 2006 page 58 of 108
REJ09B0336-0200