UPD70F3740GC-UEU-AX Datasheet, PDF (588/889 Pages) Renesas Technology Corp – RENESAS MCU

V850ES/JG3
(4) Start ~ Address ~ Data ~ Start ~ Address ~ Data ~ Stop
CHAPTER 17 I²C BUS
<1> When WTIMn bit = 0 (after restart, address mismatch (= not extension code))
ST AD6 to AD0 R/W ACK D7 to D0 ACK
S1
S2
S1: IICSn register = 0001X110B
S2: IICSn register = 0001X000B
S3: IICSn register = 00000X10B
Δ 4: IICSn register = 00000001B
ST AD6 to AD0 R/W ACK D7 to D0
S3
ACK
SP
Δ4
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2
<2> When WTIMn bit = 1 (after restart, address mismatch (= not extension code))
ST AD6 to AD0 R/W ACK D7 to D0
S1
S1: IICSn register = 0001X110B
S2: IICSn register = 0001XX00B
S3: IICSn register = 00000X10B
Δ 4: IICSn register = 00000001B
ACK ST
S2
AD6 to AD0 R/W
ACK D7 to D0
S3
ACK
SP
Δ4
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Page 572 of 870