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UPD70F3740GC-UEU-AX Datasheet, PDF (548/889 Pages) Renesas Technology Corp – RENESAS MCU
V850ES/JG3
CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
16.9 Cautions
(1) When transferring transmit data and receive data using DMA transfer, error processing cannot be performed even if
an overrun error occurs during serial transfer. Check that the no overrun error has occurred by reading the
CBnSTR.CBnOVE bit after DMA transfer has been completed.
(2) In regards to registers that are forbidden from being rewritten during operations (CBnCTL0.CBnPWR bit is 1), if
rewriting has been carried out by mistake during operations, set the CBnCTL0.CBnPWR bit to 0 once, then
initialize CSIBn.
Registers to which rewriting during operation are prohibited are shown below.
• CBnCTL0 register: CBnTXE, CBnRXE, CBnDIR, CBnTMS bits
• CBnCTL1 register: CBnCKP, CBnDAP, CBnCKS2 to CBnCKS0 bits
• CBnCTL2 register: CBnCL3 to CBnCL0 bits
(3) In communication type 2 and 4 (CBnCTL1.CBnDAP bit = 1), the CBnSTR.CBnTSF bit is cleared half a SCKBn
clock after occurrence of a reception complete interrupt (INTCBnR).
In the single transfer mode, writing the next transmit data is ignored during communication (CBnTSF bit = 1), and
the next communication is not started. Also if reception-only communication (CBnCTL0.CBnTXE bit = 0,
CBnCTL0.CBnRXE bit = 1) is set, the next communication is not started even if the receive data is read during
communication (CBnTSF bit = 1).
Therefore, when using the single transfer mode with communication type 2 or 4 (CBnDAP bit = 1), pay particular
attention to the following.
• To start the next transmission, confirm that CBnTSF bit = 0 and then write the transmit data to the CBnTX
register.
• To perform the next reception continuously when reception-only communication (CBnTXE bit = 0, CBnRXE bit =
1) is set, confirm that CBnTSF bit = 0 and then read the CBnRX register.
Or, use the continuous transfer mode instead of the single transfer mode. Use of the continuous transfer mode is
recommended especially for using DMA.
Remark n = 0 to 4
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Page 532 of 870