UPD70F3740GC-UEU-AX Datasheet, PDF (565/889 Pages) Renesas Technology Corp – RENESAS MCU

V850ES/JG3
CHAPTER 17 I²C BUS
(3) IIC flag registers 0 to 2 (IICF0 to IICF2)
The IICFn register sets the I²C0n operation mode and indicates the I²C bus status.
This register can be read or written in 8-bit or 1-bit units. However, the STCFn and IICBSYn bits are read-only.
IICRSVn enables/disables the communication reservation function (see 17.14 Communication Reservation).
The initial value of the IICBSYn bit is set by using the STCENn bit (see 17.15 Cautions).
The IICRSVn and STCENn bits can be written only when operation of I²C0n is disabled (IICCn.IICEn bit = 0). After
operation is enabled, IICFn can be read (n = 0 to 2).
Reset sets this register to 00H.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Page 549 of 870